1. Technical Field
The present invention relates to an improved data processing system and in particular to a method and apparatus for transferring data. Still more particularly, the present invention relates to an improved buffer controller.
2. Description of the Related Art
A compact disc read-only memory (CD-ROM) is a form of storage characterized by high capacity (roughly 650 megabytes) and the use of laser optics rather than magnetic means for reading data. Although CD-ROM drives are strictly read-only, they are similar to CD-R drives (write once, read many), optical WORM devices, and optical read-write drives. CD-ROM drives have become a common media for storing data and programs. Integrated circuits (ICs) and buffers are used in a CD-ROM drive to decode and transfer data from a CD-ROM to a computer. A buffer used in the transfer of data may be as large as 4 megabytes of a word-wide dynamic random access memory (DRAM) for a total of 8 megabytes of data. A xe2x80x9cwordxe2x80x9d is the native unit of storage on a particular data processing system. A word is the largest amount of data that can be handled by the microprocessor in one operation and also, as a rule, is usually the width of the main data bus. 16-bit and 32-bit words are the most common sizes.
To improve data transfer speeds and increase target-side cache capabilities, large memory buffers are needed to store the CD-ROM data. Eight megabytes (MB) of CD-ROM data stored in a 4mxc3x9716 memory, for example, would require 22 address lines-23 address lines for byte-wide access. The access speed should be as fast as possible. Data is stored in the buffer for sequential addresses. For example, an access to a location N would be followed by accesses to locations N+1, N+2 and so on in sequential order. Most CD-ROM controllers, however, are 8-bit controllers. As a result, word-wide or greater accesses require multiple byte-wide read and/or writes by these controllers. Most CD-ROM controllers are unable to supply a 22-bit address. Further, while an indexed addressing scheme could solve the problem of address size, this scheme would mean that each read access would require several writes to supply the 22-bit address and a read to actually obtain the desired data. A write access would require a similar number of byte-wide accesses by the controller. A flag also might be required to indicate whether a read or write access is to be performed, which could require an additional access to the IC.
Therefore it would be advantageous to have an improved method and apparatus to access data in the buffer from the controller.
The present invention provides a method and apparatus for accessing successive memory locations without the need for multiple index register writes and without the need for a wide address bus from the controller into a memory control system. The memory control system includes an index register and a data register. The index register has a connection to the controller and the buffer. The data storage register has a connection to the buffer and to the controller. The index register receives an address to a location in the buffer. Each time the contents of the index register are changed, data associated with the address are automatically written into the data storage register. Each time the data storage register is accessed (read or written), the index register is incremented. The controller is able to read or write unlimited numbers of sequential locations up to the full buffer space, using only a single controller access per byte.